TMR Processor (T8110B) and System Components Technical Overview

1. TMR Processor Hardware & Architecture

The TMR Processor (T8110B) is a fault-tolerant module built on a Triple Modular Redundancy (TMR) 

architecture, arranged in a lock-step configuration. It features:

• Fault Containment Regions (FCR): Three separate FCRs, each housing a Motorola Power PC series

  processor and its associated memory. This design physically and logically isolates processing units to

  prevent fault propagation.

• Front Panel Components: As shown in Figure 5-3: TMR Processor, the front panel includes

  status/diagnostic LEDs, a reset button, and a maintenance enable keyswitch. It also contains a fault

  containment region for non-critical simplex functions (e.g., diagnostics port, serial communications

  drivers, IRIG-B interface).

• Power Supply: Internal voltages for processors and FCRs are derived from dual redundant +24V dc

  power, supplied via the module connector from the controller chassis backplane.

2. TMR Processor Operation & Redundancy Mechanisms

The module’s three processors work in tandem to ensure reliability:

• Parallel Execution & Lock-Step Synchronization: Each processor independently executes the

  application program while staying in lock-step synchronization with the other two. If one processor

  diverges, mechanisms exist to re-synchronize it with the remaining two.

• Voting & Fault Detection:

• 2oo3 Voting: Voter circuits perform a continuous two-out-of-three vote on data from the inter-

  module bus, ensuring only consistent data is used.

• Fault Isolation: Voting and fault detection circuits identify and isolate transient, intermittent, and

  permanent faults as they occur. All faults are recorded in the system’s fault history, and

  permanent faults are annunciated via an LED on the module front panel.

• Memory Retention: System data, fault information, and user program data are retained in non-volatile

  memory for up to 10 years (conservatively rated) via a non-replaceable battery, even during power

  loss.

3. Maintenance / Security Keyswitch

The front panel keyswitch prevents unauthorized access and controls system modes:

• Modes:

• Run: Locks memory to prevent unintended changes. Prior to version 3.5, configuration tools and

  the Toolset program do not communicate with the system in this position, though command line

  utilities (e.g., Dumptrux) still interact.

• Maintain: Allows downloading of application programs and system configurations from an

  engineering workstation (with appropriate access permissions).

• Key Removal & Additional Position: The key can be removed in either position to prevent

  unauthorized use. There is a momentary third position, but it has no function currently.

• Nuance for Versions (e.g., 3.5+): The modes may be conceptualized as “secure / write access” or

  “read only / read-write” for clearer understanding of access levels.

4. Reset Button

The fault Reset button serves a specific diagnostic function:

• Action: Pressing it clears all recorded faults and resets fault counters. Note that fault testing continues,

  so active faults will be recorded again.

• Diagnostic Cycle Time: The time to complete a full diagnostic cycle ranges from less than a second to

  several minutes, depending on system and application size. Some faults may re-latch so quickly they

  appear not to clear.

• Logging: Resets are recorded in both microprocessor and I/O module logs.

5. Module Status LEDs

The processor front panel features eleven status LEDs, categorized as follows:

• LED Types: Three Healthy, one Active, one Standby, one Educated, one Run, one Inhibit, one System

  Healthy, and two User LEDs. Healthy indicators are controlled directly by each module slice; all other

  LEDs are controlled by the processor module itself.

• LED Indications (detailed in Table 5-1: Processor LED Indications):

• Healthy: Indicates overall health of each processor slice (steady green = healthy; flashing red =

  slice failed).

• Active: Steady green when the Processor is in Active mode.

• Standby: Steady green in Standby mode; flashing green when changing from Active to Standby.

• Educated: Steady green when Educated; flashing green during Education; off when not Educated or application has stopped.

• Run: Flashing green during normal operation; steady green in Standby; off when the Active

  Processor’s application stops.

• Inhibit: Flashing green when inputs/outputs are locked (forced) or during a failed

  Active/Standby changeover (due to configuration mismatch).

• System Healthy: Steady green = healthy; flashing red = system boot-up fault, self-test fail, IMB

  error, I/O module error, Active/Standby module non-response, I/O module slice error, channel

  fault, or module simulation; off = illegal state.

• User 1 and User 2: General-purpose red LEDs controlled by software.

6. Processor Configuration & Communication

The TMR processor’s software and hardware configurations must align, and it can be configured via two 

methods:

• Engineering Workstation (Front Panel Diagnostics Port): Communicates via a serial port with a data

  rate of 19.2k bits/sec.

• Communications Interface Module: Supports serial and Ethernet communications. Note that the

  Toolset software only operates with this interface via Ethernet.

7. Expander Assembly Communication

For I/O modules in an expander assembly, communication with the TMR processor is facilitated by an 

expander interface module within the controller assembly. This ensures seamless integration of distributed 

I/O into the TMR system architecture.

8. Processor Operation Block Diagram (Figure 5-4)

The block diagram illustrates the internal architecture:

• Triple Processors (A, B, C): Each processor has dedicated bus interfaces and memory, with voter

  circuits at both the Processor Memory Voting Bus and Inter-Module Bus levels.

• Voter Circuits: These circuits enforce the 2oo3 voting logic, ensuring data consistency between

  processors and between the processor system and the inter-module bus.

• Trusted TMR Processor Boundary: The dashed line denotes the enclosed, fault-tolerant core of the

  TMR processor, emphasizing its isolated and redundant design.

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